The present invention generally relates to an electrostatic discharge (ESD) protection scheme, and particularly to a string contact structure for an improved ESD performance.
Electrostatic discharge (ESD) is the sudden and momentary electric current that flows when an excess of electric charge, stored on an electrically insulated object, finds a path to an object at a different electrical potential such as ground. When a static charge moves in an integrated circuit (IC), it becomes a current that damages or destroys gate oxide, metallization, and junctions. ESD can occur when a charged body touches an IC, a charged IC touches a grounded surface, or a charged machine touches an IC.
ESD is a common phenomenon that occurs during the handling of semiconductor devices. Electrostatic charges may accumulate and cause potentially destructive effects on a semiconductor IC device. ESD stress can occur during a testing phase of IC fabrication, during installation of the IC onto a circuit board, as well as during use of equipment in which the IC has been installed. ESD damage to a single IC in an electronic device can partially or sometimes completely stop its operation.
As technology advances, ESD durability has become an increasing concern for IC manufacture. As semiconductor processing technology has advanced into deep submicron regimes, the resulting scaled-down semiconductor devices including shallower junction depth and thinner gate oxide layers are less tolerant to ESD stress. Therefore, ESD protection circuits must be implemented at the I/O pads of the IC to prevent damage from ESD stress.
Generally, damage to a device by the ESD event is determined by the device's ability to dissipate the energy of the discharge or withstand the current levels involved. This is known as device “ESD sensitivity” or “ESD susceptibility.” Standard tests have been developed to enhance the quality and reliability of ICs, thereby minimizing the detrimental effects of ESD.
These test procedures are based on the three primary models of ESD events, namely, human body model (HBM), machine model (MM), and charged device model (CDM). The models used to perform component testing cannot replicate the full spectrum of all possible ESD events. Nevertheless, these models have been proven to be successful in reproducing over 95% of all ESD field failure signatures. Some devices may be more easily damaged by discharges occurring within the automated equipment, while others may be more prone to damage from handling by personnel.
One of the most common causes of electrostatic damage is the direct transfer of electrostatic charge from the human body or from a charged material to the ESD sensitive device. When a person walks across a floor, an electrostatic charge accumulates on his body. Simple contact of a finger to the leads of the ESD sensitive device allows the body to discharge, possibly causing device damage. The model used to simulate this event is the human body model (HBM).
The human body model is the most commonly used model for classifying device sensitivity to ESD. The human body testing model represents the discharge from the fingertip of a standing individual delivered to the device. It is modeled by a capacitor discharged through a switching component and a series resistor into the component. A further description will be made with reference to FIG. 4.
A discharge similar to the HBM event can also occur from a charged conductive object, such as a metallic tool or fixture. This model is known as the machine model (MM). The machine model consists of a 200 pF capacitor discharged directly into a component with no series resistor. As a worst-case human body model, the machine model may be overly severe. However, there are real-world situations that this model represents, for example the rapid discharge from a charged board assembly or from the charged cables of an automatic tester. The same test equipment is used as for the HBM testing, but the test head is slightly different. The MM version does not have a series resistor, but otherwise the test board and the socket are the same as for HBM testing.
Traditionally, a contact array having a plurality of contact holes as shown in FIG. 2A has been used to form a high voltage ESD protection circuit. However, such contact array often produces localized contact damage as visually observed by hot spots or a scanning electron microscope (SEM) analysis. A cross-sectional SEM analysis shows that only one or two contacts are often damaged in a contact array, which is believed to be caused by a non-uniform ESD current flow or distribution within the contact array when ESD zaps are applied to the device under ESD test. If this happens, ESD performance will be degraded.
As such, it is desirable to devise a new ESD contact structure where no localized contact failure occurs as observed in the conventional contact array, such that an improved ESD performance can be obtained.